C++ API reference¶

This section is the per-symbol API reference for the public headers of every Tero module. The Markdown pages under docs/api/* are auto-generated from the source code; the table below is the hand-curated entry point that tells you which header to look at for which concept.

Public headers by module¶

Header	Module	What you'll find
`tero/types.hpp`	`tero_interfaces`	Strong types (`PhysAddr`, `VirtAddr`, `CoreId`, `SimTimeNs`, `IrqLine`), `ErrorCode`, `Result<T>`, `LogLevel`, `to_underlying`.
`tero/address_range.hpp`	`tero_interfaces`	`AddressRange` half-open span used by the bus for MMIO dispatch.
`tero/ilogger.hpp`	`tero_interfaces`	`ILogger` injected logging interface.
`tero/itime_source.hpp`	`tero_interfaces`	`ITimeSource` — current sim time, injected.
`tero/iperipheral.hpp`	`tero_interfaces`	`IPeripheral` plus the supporting structs (`AccessSize`). The single interface to implement when adding a peripheral.
`tero/peripheral_context.hpp`	`tero_interfaces`	`PeripheralContext` injected into `IPeripheral::attach()` — gives a peripheral access to bus, IRQs, scheduler, logger, time source, character device.
`tero/ibus_master.hpp`	`tero_interfaces`	`IBusMaster` for DMA-capable peripherals.
`tero/iinterrupt_source.hpp`	`tero_interfaces`	`IInterruptSource` (peripheral side) — raise / lower an IRQ line.
`tero/ischeduler.hpp` / `tero/ievent.hpp`	`tero_interfaces`	Generic event scheduler for time-delayed callbacks.
`tero/icpu_bus.hpp`	`tero_interfaces`	The CPU's view of the bus (fetch / load / store at virtual addresses).
`tero/icharacter_device.hpp`	`tero_interfaces`	`ICharacterDevice` for UART input/output redirection.
`tero/ipublisher.hpp`	`tero_interfaces`	`IPublisher` for observable-state registration (SMP2 prep).
`tero/ifault_injector.hpp`	`tero_interfaces`	Hooks for Level-3 fault injection.
`tero/ientry_point.hpp`	`tero_interfaces`	Named callable entry points (SMP2 prep).
`tero/core/cpu_state.hpp`	`tero_core`	Per-core architectural state (PSR/WIM/TBR, register windows, FP context, power-down latch, error-mode flag).
`tero/core/step.hpp`	`tero_core`	Single-cycle driver `step(state, cpu_bus)`.
`tero/core/decoder.hpp` / `decoded_insn.hpp`	`tero_core`	SPARC V8 decoder + `DecodedInsn` ADT.
`tero/core/handlers.hpp`	`tero_core`	Public `execute()` dispatcher.
`tero/core/trap.hpp`	`tero_core`	TT constants + `status_to_tt()` helper.
`tero/core/fpu.hpp` / `fpu_handlers.hpp`	`tero_core`	FPop1 / FPop2 handlers backed by SoftFloat 3e.
`tero/core/softfloat_context.hpp`	`tero_core`	Per-CpuState SoftFloat state wrapper.
`tero/bus/system_bus.hpp`	`tero_bus`	`SystemBus` (RAM + peripheral MMIO routing, big-endian typed accessors).
`tero/bus/ram.hpp`	`tero_bus`	`Ram` raw-byte backing store.
`tero/peripherals/irqmp.hpp`	`tero_peripherals`	Multi-core interrupt controller (GR712RC) implementing `IPeripheral` + `IInterruptController`.
`tero/peripherals/irqamp.hpp`	`tero_peripherals`	GR740 IRQ(A)MP — sibling to IrqMP, distinct GRLIB core. See Decision IrqMP vs IrqAMP.
`tero/peripherals/gptimer.hpp`	`tero_peripherals`	4-subtimer GPTimer + scaler.
`tero/peripherals/apbuart.hpp`	`tero_peripherals`	APBUART (polling + IRQ + FIFO modes).
`tero/peripherals/memctrl.hpp`	`tero_peripherals`	FTMCTRL memory controller stub.
`tero/peripherals/ram.hpp`	`tero_peripherals`	Generic RAM entity (primary RAM, on-chip blocks).
`tero/peripherals/rom.hpp`	`tero_peripherals`	Immutable memory entity (boot PROM at `0x00000000`).
`tero/peripherals/version.hpp`	`tero_peripherals`	Module version string.
`tero/runtime/emulator.hpp`	`tero_runtime`	`Emulator` — the public entry point. Owns the cores, the bus, the scheduler, the peripherals, the GDB stub, the logger, the character device.
`tero/runtime/emulator_config.hpp`	`tero_runtime`	`EmulatorConfig` plain struct + `gr712rc_config()` / `gr740_config()` factories. See Configuration.
`tero/runtime/run_result.hpp`	`tero_runtime`	`RunResult` + `HaltReason` enum.
`tero/runtime/event_scheduler.hpp`	`tero_runtime`	Min-heap event scheduler used by peripherals.
`tero/runtime/elf_loader.hpp`	`tero_runtime`	SPARC ELF32 loader. Detects mkprom2 `.rom` (ELF-wrapped) and flattens its `PT_LOAD` segments into PROM.
`tero/runtime/cpu_bus_bridge.hpp`	`tero_runtime`	Adapter that exposes `bus::SystemBus` as `ICpuBus` to the CPU step.
`tero/runtime/gdb_stub.hpp`	`tero_runtime`	`GdbStub` RSP backend + helpers (`StopSignal`, `signal_from_tt`, `rtems_layout::*`). See Debugging with GDB.
`tero/runtime/soc_family.hpp`	`tero_runtime`	`SocFamily` enum (GR712RC / GR740) used by config factories.
`tero/runtime/version.hpp`	`tero_runtime`	Build version string.
`tero/defaults/stdout_logger.hpp`	`tero_defaults`	`StdoutLogger` (default `ILogger`).
`tero/defaults/stdout_char_device.hpp`	`tero_defaults`	`StdoutCharDevice` (default `ICharacterDevice`).
`tero/defaults/null_fault_injector.hpp`	`tero_defaults`	`NullFaultInjector` (default `IFaultInjector`).
`tero/defaults/debug_publisher.hpp`	`tero_defaults`	`DebugPublisher` (default `IPublisher` — emits JSON).

For the full per-class / per-method reference, build the Doxygen + doxybook2 output as described below.

Generating the API docs¶

Prerequisites:

Doxygen ≥ 1.9
doxybook2 ≥ 1.5

Steps:

# 1. Generate XML from Doxygen
doxygen docs/Doxyfile

# 2. Convert XML to Markdown
doxybook2 --input build/doxygen/xml --output docs/api --config docs/doxybook2.json

The Markdown files land under docs/api/ and are picked up automatically by Zensical when you run zensical build or zensical serve.

CMake convenience target¶

If you configured with -DTERO_BUILD_DOCS=ON:

cmake --build build --target docs

This runs Doxygen + doxybook2 + zensical build in a single step.

Note¶

The auto-generated Markdown is not committed to the repository. It is regenerated on demand during the documentation build so it always stays in sync with the current source tree. The hand-curated table above changes only when public headers are added, removed or renamed.